In recent years, semiconductor devices in which a plurality of semiconductor chips are laminated, such as a multi chip package (MCP) which is a representative example, are effectively utilized to achieve densification, miniaturization, and thinning of the semiconductor device.
A through silicon via (TSV) has been popularized as an example of technologies for laminating semiconductor chips in such kinds of semiconductor devices. The TSV refers to, for example, a through electrode that penetrates through between main surfaces of a semiconductor substrate which is a base substrate of the semiconductor chips. Various processes of manufacturing such kinds of semiconductor devices have been devised to improve a throughput and increase the degree of integration in a thickness direction.
In a semiconductor device, a TSV and a silicon through structure having a larger area than the TSV are present at the same layer in some cases. At this time, the silicon through structure is etched more excessively than the TSV by the micro-loading effect when reactive ion etching (RIE) is performed. In such a structure, when the silicon through structure is etched more excessively by the RIE, the bottom silicon of the silicon through structure having the larger cross-sectional area than the TSV is etched in a direction perpendicular to an etching direction (notching). At this time, the notched portion may cause a defect.